One of the most basic electrical junctions used in modern electronic devices is the conductor-semiconductor junction. In some cases, depending on the materials used, the junction may be ohmic in nature (i.e., the junction may have negligible resistance regardless of the direction of current flow). However in other cases the junction is inherently rectifying; that is, the junction tends to conduct current in one direction more favorably than in the other direction.
By 1938, Schottky had developed a theoretical explanation for such rectification; explaining that a barrier in electrical potentials at the surface of contact between the conductor and the semiconductor was responsible. In order for electrons or holes to pass between the conductor and the semiconductor, the charge carriers had to overcome this “Schottky barrier”. The height of the barrier is determined by the difference in potentials between the carriers in the metal and those at the conduction band states of minimum energy (relevant to electrons) or valence band states of maximum energy (relevant to holes) of the semiconductor.
Metal/semiconductor junctions are fundamental components of field-effect transistors (FETs). With a FET device in the “on” state (in which charge is induced in a channel region by a gate electrode), carriers must relatively freely travel from one or more source(s), through the channel, and into one or more drains, where whether a given channel tap is better identified as a “source” or as a “drain” depends on the relative potential applied to the channel tap. Two types of channel taps are commonly used: “doped” semiconductor regions and metals.
With a doped source or drain, primarily substitutional impurities (dopants) yield a local reservoir of charge carriers (typically electrons for an n-channel transistor and holes for a p-channel transistor). To connect the transistor to other elements within the circuit, or to external connections of the circuit, metal is placed in electrical contact with the impurity-rich region. The critical parameter in a doped source or drain is how effectively the carriers can be exchanged with the reservoir (electrons for an n-type reservoir or holes for a p-type reservoir). A variety of junction characteristics contribute to a free exchange of these carriers, including:                1. A low Schottky barrier height due to an effective metal workfunction that is sufficiently low (for an n-type reservoir) or sufficiently high (for a p-type reservoir).        2. A high electric field at the interface, thinning the Schottky barrier and facilitating the tunneling of carriers through it. For example, higher concentrations of ionized impurities in the semiconductor near the metal/semiconductor interface tend to result in higher electric fields at that interface.        3. A shift in the effective band edges of the semiconductor, for example by “band gap narrowing” due to high concentrations of ionized impurities.        4. An increase in the rate of carrier generation/recombination processes in the vicinity of the barrier, facilitating the exchange of electrons and holes there, contributing to the flow of carriers between the contact and the channel when the channel is “on”.        
Metal or “Schottky” channel taps do not use impurity-rich regions between the contact and the channel(s), instead placing a metal conductor in direct contact with the region in which the channel is formed. The requirements on the Schottky barrier height at Schottky channel taps tend to be stricter than those for doped channel taps. There are several reasons that Schottky channel taps have stricter requirements. One is that Schottky channel taps tend to have a smaller metal/semiconductor interface area over which carriers can cross the interface; carriers must cross a Schottky contact in close proximity to the channel, where the channel is typically only a few nanometers thick, while with a doped channel tap carriers may be able to spread over a much broader area, traveling through the conductive impurity-rich region before or after crossing the metal/semiconductor boundary. Another reason is that a higher electric field at the contact (item 2 in the preceding list), impurity-induced band edge shifts (item 3 in the preceding list), and enhanced generation/recombination (item 4 in the preceding list) are less available to Schottky channel taps. Regions of high concentrations of ionized impurities (dopants) are unavailable, and substantially enhanced generation/recombination processes would increase the “off-state” leakage current.
So for both types of source or drain, doped or Schottky, but especially Schottky, reducing the Schottky barrier height is beneficial for the efficient transfer of current between the source(s) and drain(s) when the channel is in the “on” state. The most straightforward approach to reducing the Schottky barrier height is to choose a metal with a lower (for an n-channel transistor) or higher (for a p-channel transistor) workfunction. However, metal/semiconductor interactions reduce the efficacy of this approach.
The Schottky barrier is affected by a chemical and/or electrical interaction between the metal and the semiconductor with which it is in contact. The result of the interaction may be a charge dipole layer at the interface, which is affected by the potential energy of carriers in the metal, the energy levels of the available semiconductor conduction or valence band states, and possibly energy levels induced in the semiconductor gap due to proximity with the metal. The charge dipole may be “extrinsic”, due to imperfections in the crystal structure at or in the vicinity of the interface, or “intrinsic”, a fundamental consequence of the proximity and/or local bonding of the different materials. This dipole tends to have a polarity and strength such that it causes the Fermi level of the metal to be roughly aligned with an energy level in the semiconductor (at the metal/semiconductor interface) associated with the “forbidden gap” of the semiconductor: an energy at which there are essentially no “free” electron or hole states. With this alignment, there are Schottky barriers to the conduction and valence bands. Among the approaches to describing this “intrinsic” interaction are those of R. Tung, Phys. Rev. B, vol. 45, no. 23, pp. 13509-13523 (1992), and W. Mönch, Surface Science, vol. 300, pp. 928-944 (1994).
In either case, an approach to reducing the intrinsic interaction (as described by Grupp and Connelly in the above-cited patent applications) is to impose an interfacial layer between the semiconductor forming the channel and the metal. If this material can be formed with a low defect density, minimizing “extrinsic” states, while reducing the intrinsic states arising from the proximity of the metal to the semiconductor, the magnitude of the charge dipole can be reduced, allowing for a reduced or even eliminated Schottky barrier between the metal and the semiconductor in the channel region. The key is that the material be sufficiently thin so that, even if there is a Schottky barrier between the metal and the interfacial layer, free carriers of the appropriate type (electrons or holes) can be readily exchanged between the channel region semiconductor and the metal. The carriers may, for example, tunnel through the barrier associated with the thin interfacial layer.
Thus, Grupp and Connelly demonstrated that controlling or adjusting the barrier height of a metal/semiconductor junction could produce electrical devices of desired characteristics. For example, using the methods described in the above-cited patent applications one can tune MOSFETs to address issues of on-resistance and off-state leakage currents, as well as control short-channel effects. However, certain challenges must be overcome to achieve these advantages; among them, the ability to control the thickness of the interface layer between the metal and the semiconductor.
Controlling the thickness of interfacial layers or films of the types described in the above-cited patent applications (e.g., materials which, in their bulk form, are insulators, such as silicon nitride, Si3N4, or oxides of semiconductors, such as SiO2, or of metals, such as ZrO2) may not be easy. The film needs to be sufficiently thin that the tunneling of free electrons and holes through the resulting potential barrier is sufficiently probable that the peak available current in the device is not substantially diminished. Achievement of this needed tunneling probability, while maintaining the needed reduction in the metal/semiconductor interaction, may require near-monolayer control of the interfacial layer thickness.
Additionally, the present inventors have recognized that the interfacial material's interface with the channel region semiconductor should have a low defect density, avoiding “extrinsic” states and/or other deleterious effects associated with a high defect density. And, to facilitate the tunneling of free carriers through the interfacial layer, the material used for that layer should have sufficiently small potential barriers at the conduction and valence band, combined with suitably low “tunneling effective masses” for electrons and holes, where the “tunneling effective mass” describes how readily, for a given potential barrier height, carriers tunnel. Conversely, since material with weaker intrinsic interactions with metals tend to have wider band gaps, an interfacial layer in a preferred embodiment will not in general be one with a minimum barrier height to the conduction or valence band of the semiconductor with which it is in contact. Finally, if the interfacial layer does tend to “pin” the Fermi level towards a given value (a value at which the dipole at the interface between the interfacial layer and the metal becomes small), that value should preferably be closer to the band edge associated with the channel carrier (the conduction band for n-channel transistors, the valence band for p-channel transistors), of the material forming the channel region, resulting in a reduced tendency for the “pinning” to increase the Schottky barrier height between the metal and the channel region semiconductor for the carrier type of the channel.